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--- infra:led-display-sign [2025/07/22 16:37] – mamikk
+++ infra:led-display-sign [2025/07/25 18:18] (current) – mamikk
@@ Line 19: / Line 19: @@
 Datasheet: https://ww1.microchip.com/downloads/en/devicedoc/doc4184.pdf
+Intel MCS 51 MICROCONTROLLER FAMILY USER’S MANUAL: https://datasheets.chipdb.org/Intel/MCS51/MANUALS/27238302.PDF
 ===== Firmware =====
@@ Line 39: / Line 41: @@
   * The first 256 bytes of the lower 64k and upper 64k are similar (both contains "(c) COPYRIGHT ADAPTIVE MICRO SYSTEMS, INC. 1991" at the same offset)
   * All the ASCII strings are in the lower 64k (except for the copyright message which is in both)
+  * According to Intel MCS 51 users manual: After reset, the CPU begins execution from location 0000H.
+  * Ghidra can read Intel 8051 binaries.
+  * The first three byes of low and high are 02 01 00 which is LJMP 0x0100 which suggest that both files are code and thus that PMEM is bank switched
+  * The real program seem to start at 0x0100 in both low and high
+  * Low has data from 0x0000 - 0xc3ef
+  * High has data from 0x0000 - 0x8ef3
+  * High has zero-patterns starting at 0x1000 or so which suggest that this is data and not code, but it not strings so maybe font data?
+  * In high at 0x0100 the code does some bit fiddling with IO ports and then does an infinite loops. While low has nops at the same addresses. So this probably triggers the bank switching to low, maybe with IO port P1.
 ===== Ports =====